PCoreS – Research into a Parametric Family of IP Cores for Accelerating Vendor-Agnostic SNNs on FPGAs and ASICs

Project Description:

The project, entitled Research into a Parametric Family of IP Cores for Accelerating Vendor-Agnostic SNNs on FPGAs and ASICs (PCoreS), is an industrial research initiative aimed at strengthening the microelectronics and semiconductor value chain in the area of chip and Intellectual Property (IP) core design and development.

Its goal is to generate a family of IP cores for accelerating Spiking Neural Networks (SNNs) based on a parametric design. The accelerators will support a broad and extensible range of neuron models, connectivity configurations, computing power, encoding methods, on-IP training methods, numerical precision levels and applications in areas such as Artificial Intelligence and neuroscience.

This will make it possible to use a single project to develop accelerators for the full range of FPGAs, from low-performance and low-power devices to server-grade FPGAs designed to handle large volumes of data.

General Objective:

The main objective of the PCoreS project is to enable AI developers and neuroscience researchers to use FPGA technology as an accelerator in a similar way to how GPUs are currently used for Artificial Neural Networks (ANNs).

Currently, SNN processing remains inefficient. Through this project, end users will be able to use commercially available FPGAs—regardless of the manufacturer—together with the software components developed within the project, allowing them to work transparently with the hardware accelerator.

Specific Objectives:

Research the parametric design of a family of IP cores.
Research an extensible and modular design for SNNs, enabling the rapid and straightforward integration of new improvements and state-of-the-art techniques.
Research the design of a software package that prioritises ease of use for the end user.